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The impact of clock jitter on AD/DA conversion performance is detailed for several conversion methods. Account is taken of the spectral distribution of both the jitter and of the converted waveform. The inadequacy of a single ?picosecond? performance figure is shown, and the use of a dBc/sqrt(Hz) specification is proposed instead.
Author (s): Putzeys, Bruno; de Saint Moulin, Renaud
Affiliation:
DSL, BE3001 Heverlee, Belgium
(See document for exact affiliation information.)
AES Convention: 116
Paper Number:6122
Publication Date:
2004-05-06
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Session subject:
Signal Processing
Permalink: https://aes2.org/publications/elibrary-page/?id=12637
(257KB)
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Putzeys, Bruno; de Saint Moulin, Renaud; 2004; Effects of Jitter on AD/DA Conversion - Clock and Interface Jitter Specifications [PDF]; DSL, BE3001 Heverlee, Belgium; Paper 6122; Available from: https://aes2.org/publications/elibrary-page/?id=12637
Putzeys, Bruno; de Saint Moulin, Renaud; Effects of Jitter on AD/DA Conversion - Clock and Interface Jitter Specifications [PDF]; DSL, BE3001 Heverlee, Belgium; Paper 6122; 2004 Available: https://aes2.org/publications/elibrary-page/?id=12637