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A single-chip implementation of the Dolby AC-3 multichannel audio coding algorithm is presented. AC-3 is a high-quality, low bit-rate coding technique for 5.1-channel audio. This paper describes an efficient implementation of the algorithm on a powerful new DSP chip, the Zoran ZR38000. Specific areas in which the chip architecture has been exploited to optimize the algorithm are discussed, and contrasted with an equivalent implementation on a multichip platform using standard DSP technology.
Author (s): Vernon, Steve; Fruchter, Vlad; Kusevitzky, Sergio
Affiliation:
Dolby Laboratories, San Francisco, CA ; Zoran Corporation, Santa Clara, CA
(See document for exact affiliation information.)
AES Convention: 95
Paper Number:3775
Publication Date:
1993-10-06
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Session subject:
Perceptual Coding
Permalink: https://aes2.org/publications/elibrary-page/?id=6458
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Vernon, Steve; Fruchter, Vlad; Kusevitzky, Sergio; 1993; A Single-Chip DSP Implementation of a High-Quality Low Bit-Rate Multichannel Audio Coder [PDF]; Dolby Laboratories, San Francisco, CA ; Zoran Corporation, Santa Clara, CA ; Paper 3775; Available from: https://aes2.org/publications/elibrary-page/?id=6458
Vernon, Steve; Fruchter, Vlad; Kusevitzky, Sergio; A Single-Chip DSP Implementation of a High-Quality Low Bit-Rate Multichannel Audio Coder [PDF]; Dolby Laboratories, San Francisco, CA ; Zoran Corporation, Santa Clara, CA ; Paper 3775; 1993 Available: https://aes2.org/publications/elibrary-page/?id=6458